Scale up and out compression
US12282809B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2021 |
| Grant date | Apr 22, 2025 |
| Priority date | — |
| Expiry date | Aug 24, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L65/75
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing apparatus includes graphics processors connected by a network connection, where the graphics processors pass compressed data. A first graphics processor stores data blocks as compressed data in a memory. The compressed data has data blocks of variable size, where a size of a block of compressed data depends on a compression ratio of the block of compressed data. A second graphics processor also stores data blocks as compressed data. The first graphics processor concatenates a variable number of blocks of compressed data into a packet of fixed size to send to the second graphics processor. The packet has a variable number of blocks of compressed data depending on the compression ratios of the multiple blocks of compressed data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.