GOA circuit and display panel
US12283214B2 · kind B2 · utility
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18Claims
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Assignee
Inventor
Key dates
| Filing date | Mar 23, 2021 |
| Grant date | Apr 22, 2025 |
| Priority date | — |
| Expiry date | Mar 23, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/043
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a gate driver on array (GOA) circuit including a plurality of GOA units disposed in N-stage cascade, and an nth-stage GOA unit includes a node control module, a pull-up module, a pull-down module, a pull-down maintaining module, and a stop control module, wherein 1<n<N−1, and both the n and the N are positive integers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.