Optimizing a layout of an emitter array
US12283795B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Dec 5, 2022 |
| Grant date | Apr 22, 2025 |
| Priority date | — |
| Expiry date | Oct 18, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S2301/176
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A closely spaced emitter array may include a first emitter comprising a first plurality of structures and a second emitter, adjacent to the first emitter, comprising a second plurality of structures. The first emitter and the second emitter may be configured in the closely spaced emitter array such that different types of structures between the first plurality of structures and the second plurality of structures do not overlap while maintaining close spacing between the first emitter and the second emitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.