Sigma delta analog-to-digital converter and method for eliminating idle tones of sigma delta analog-to-digital converter
US12283966B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2023 |
| Grant date | Apr 22, 2025 |
| Priority date | — |
| Expiry date | Jul 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/338
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Sigma Delta analog-to-digital converter (ADC) and a method for eliminating idle tones of the Sigma Delta ADC are provided. The Sigma Delta ADC includes a loop filter, a quantizer, an adder and a digital-to-analog converter (DAC). The loop filter performs filtering on a difference between an analog input signal and an analog feedback signal to generate a filtered signal. The quantizer is coupled to the loop filter, and generates a digital output signal according to the filtered signal. The adder is coupled to the quantizer, and adds a digital dithering signal to the digital output signal to generate a digital feedback signal. The DAC is coupled to the loop filter, and generates the analog feedback signal according to the digital feedback signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.