Display device including buffer transistor overlapping with valley area in plan view
US12284881B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2023 |
| Grant date | Apr 22, 2025 |
| Priority date | — |
| Expiry date | Jun 16, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/40
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display device includes: a base layer including an active area and a non-active area adjacent to the active area; a display circuit layer including a pixel circuit at the active area of the base layer, and a driving circuit at the non-active area, the driving circuit to supply a driving signal to the pixel circuit; and a display element layer on the display circuit layer and including light emitting elements to emit light. The non-active area includes a valley area formed by removing a portion of an organic insulation layer at the display circuit layer, the driving circuit includes a buffer transistor to output the driving signal, and the buffer transistor includes a control electrode and a semiconductor layer overlapping the valley area in a plan view.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.