Low-dropout regulator circuit with high loop stability based on load-dependent zero mobile compensation and method thereof
US12287660B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 24, 2022 |
| Grant date | Apr 29, 2025 |
| Priority date | — |
| Expiry date | Aug 24, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/565
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Provided is a low-dropout regulator circuit with high loop stability based on a load-dependent zero mobile compensation and a method thereof. The LDO circuit with high loop stability comprises a LDO circuit body, the LDO circuit body includes a PMOS transistor; the LDO circuit with high loop stability comprises a dynamic-resistance-boosting-circuit adaptively connected with the PMOS transistor, a dynamically variable resistor in parallel with PMOS transistor is generated according to the state of the load by the dynamic-resistance-boosting-circuit; the dynamically variable resistor is connected in parallel with PMOS transistor following the load variations to form a load equivalent resistor, a value for the formed load equivalent resistor is less than an equivalent resistance maximum value for PMOS transistor in a stable loop state, so that a high frequency pole frequency of the LDO circuit body is greater than a unit gain frequency of the LDO circuit body.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.