Efficient integrity monitoring of processing operations with multiple memory arrays
US12287874B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2022 |
| Grant date | Apr 29, 2025 |
| Priority date | — |
| Expiry date | Nov 8, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/034
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed systems and techniques are directed to efficient integrity monitoring of computational operations using multiple memory arrays collectively representative of known events associated with the computational operations. Disclosed techniques include obtaining event identification value representative of a state of the computing device associated with execution of an operation on the computing device, obtaining memory pointers and selecting, based on the memory pointers, mapping values from multiple memory arrays, computing an event response value, and classifying the operation among a plurality of classes, based on the event response value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.