Semiconductor package
US12288780B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2022 |
| Grant date | Apr 29, 2025 |
| Priority date | — |
| Expiry date | Jul 21, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package including: a package substrate; an interposer on the package substrate; a chip stack on the interposer, the chip stack including a plurality of first semiconductor chips that are stacked in a first direction; a second semiconductor chip on the interposer and spaced apart from the chip stack in a second direction intersecting the first direction; and a first signal pad, a second signal pad, and a power/ground pad on a top surface of the interposer, wherein the chip stack is mounted on the first signal pad, wherein the second semiconductor chip is mounted on the second signal pad, wherein the chip stack and the second semiconductor chip are connected to the power/ground pad, and wherein the power/ground pad overlaps a portion of the chip stack and a portion of the second semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.