Analog-to-digital converting circuit using auto-zero period optimization and operation method thereof
US12289116B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 24, 2022 |
| Grant date | Apr 29, 2025 |
| Priority date | — |
| Expiry date | Jul 19, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45534
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit includes a first amplifier that first compares a ramp signal and a reset signal of a pixel signal output from a pixel array in a first operation period, second compares the ramp signal and an image signal of the pixel signal in a second operation period, and generates a first output signal in the first and second operation periods based on first and second comparison results; and a second amplifier that charges a capacitor in response to a second auto-zero signal in a second auto-zero period, stops an operation of the second amplifier from a time point at which the second auto-zero period ends to a time point at which the first operation period starts, and generates a second output signal based on the first output signal in the first operation period and the second operation period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.