Display panel and manufacturing method thereof
US12289957B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 27, 2021 |
| Grant date | Apr 29, 2025 |
| Priority date | — |
| Expiry date | Sep 30, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1201
Abstract
A display panel and a manufacturing method are provided. The present disclosure can reduce process steps of the display panel by disposing a first source electrode and a first drain electrode of a low temperature polysilicon thin film transistor and a second source electrode and a second drain electrode of an oxide thin film transistor in a same layer. Therefore, stability of the oxide thin film transistor can be improved, a channel length of the oxide thin film transistor can be shortened correspondingly, resolution of the display panel can be improved, and a thickness of the display panel can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.