Display substrate having barrier layers in peripheral area, and display apparatus
US12289978B2 · kind B2 · utility
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2References
17Claims
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Key dates
| Filing date | Aug 17, 2021 |
| Grant date | Apr 29, 2025 |
| Priority date | — |
| Expiry date | Aug 17, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/40
Abstract
A display substrate includes at least two barrier layers in a peripheral area of the display substrate. The at least two barrier layers includes a first barrier layer forming an enclosure; and a third barrier layer on a side of the first barrier layer closer to a display area. The third barrier layer includes one or more discontinuous portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.