Array substrate and manufacturing method, display panel, and display device
US12292638B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 15, 2021 |
| Grant date | May 6, 2025 |
| Priority date | — |
| Expiry date | Oct 15, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate includes a base substrate, including a display area and a peripheral area; a driving circuit layer, located at one side of the base substrate and including a plurality of data lines and a plurality of scanning lines, where the plurality of data lines extend along a first direction and are arranged at intervals along a second direction, the plurality of scanning lines extend along the second direction and are arranged at intervals along the first direction, and the data line and the scanning line intersect with each other to define a plurality of sub-pixel areas; and a metal layer, located at one side of the driving circuit layer away from the base substrate, where the metal layer includes a plurality of metal blocks arranged at intervals, and the metal block is located at an intersection of the data line and the scanning line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.