Three-dimensional stacked programmable logic fabric and processor design architecture
US12294368B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Sep 24, 2021 |
| Grant date | May 6, 2025 |
| Priority date | — |
| Expiry date | Jun 30, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure is directed to 3-D stacked architecture for Programmable Fabrics and Central Processing Units (CPUs). The 3-D stacked orientation enables reconfigurability of the fabric, and allows the fabric to function using coarse-grained and fine-grained acceleration for offloading CPU processing. Additionally, the programmable fabric may be able to function to interface with multiple other compute chiplet components in the 3-D stacked orientation. This enables multiple compute components to communicate without the need for offloading the data communications between the compute chiplets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.