Array substrate and manufacturing method therefor, and display apparatus
US12298641B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2024 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | Apr 18, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate and a manufacturing method therefor, and a display apparatus are provided. The array substrate includes an underlay substrate, and at least one first transistor, at least one data line and at least one pixel electrode disposed on the underlay substrate. The at least one first transistor includes a first active layer and a first gate; the first gate is located on a side of the first active layer away from the underlay substrate, and orthographic projections of the first gate and the first active layer on the underlay substrate are at least partially overlapped. The first active layer is electrically connected to the data line and the pixel electrode, respectively. The data line is located on a side of the first active layer close to the underlay substrate, and the pixel electrode is located on a side of the first gate away from the underlay substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.