Patent · US Active

Peripheral interconnect controller

US12298922B2 · kind B2 · utility

0Cited by
6References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 1, 2021
Grant dateMay 13, 2025
Priority date
Expiry dateMay 17, 2042

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

There is disclosed an electronic device and a method of operating an electronic device. It has peripherals which each have one or more event outputs or task inputs, connected to a peripheral interconnect. The device also has a controller for configuring the peripheral interconnect and a memory, which are communicatively coupled to a bus system. The peripheral interconnect receives configuration data from the controller, which selectively connects peripheral event outputs and task inputs. The controller uses the bus system to access a sequence of instructions in a script stored in the memory. Each instruction in the sequence identifies a peripheral task input, event output and a second peripheral event output. Each subsequent instruction in the sequence is implemented in response to detecting an event signalled from the second peripheral event output identified by the preceding instruction in the sequence.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.