Systems and methods of estimating thermal properties of semiconductor devices
US12299369B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2022 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | Sep 17, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes: receiving a layout of an integrated circuit; identifying, based on the layout, at least a first net and at least a second net, wherein the first net extends through the integrated circuit along a vertical direction, and the second net terminates at a middle portion of the integrated circuit along the vertical direction; dividing the integrated circuit into a plurality of grid units, wherein the first net is constituted by a first subset of the plurality of grid units, and the second net is constituted by a second subset of the plurality of grid units; estimating a first thermal conductivity of each of the first subsets of grid units; estimating a second thermal conductivity of each of the second subsets of grid units; and estimating an equivalent thermal conductivity of the integrated circuit based on combining the first thermal conductivity and the second thermal conductivity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.