Cantilever nanoelectromechanical decoder circuit and methods for forming the same
US12300294B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Apr 4, 2023 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | Nov 29, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A device structure includes a two-dimensional array of memory cells embedded in a memory-level dielectric layer and overlying a substrate; first access lines electrically connected to a respective row of memory cells within the two-dimensional array; and a first decoder circuit including first cantilever nanoelectromechanical devices that overlie the two-dimensional array of memory cells, are embedded in upper dielectric material layers, and have output nodes that are electrically connected to a respective first access line selected from the first access lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.