Semiconductor package
US12300682B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 22, 2022 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | Jul 19, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a PDA chip, a MOS chip, and a wiring plate including a first principal surface and a second principal surface, the first principal surface being provided with a first rigid plate that is non-conductive and a second rigid plate that is conductive, the PDA chip being fixed to the first rigid plate by using a non-conductive bonding agent, a lower surface terminal of the MOS chip being soldered to the second rigid plate, the second principal surface being provided with an input terminal and an output terminal, the input terminal being electrically connected to the PDA chip, the output terminal being electrically connected to the second rigid plate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.