Patent · US Active

Thin film transistor and array substrate each having active layer comprising multiple oxide layers arranged in a stack

US12300753B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

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Key dates

Filing dateMay 27, 2021
Grant dateMay 13, 2025
Priority date
Expiry dateMay 6, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D99/00

Abstract

A thin film transistor, a manufacturing method thereof, an array substrate and an electronic device arc provided. The thin film transistor includes an active layer including multiple oxide layers which includes a channel layer, a transition layer and a first barrier layer, the channel layer is an layer with a highest carrier mobility, the channel layer is a crystalline or amorphous oxide layer, the transition layer is in direct contact with the channel layer, the first barrier layer is an outermost oxide layer, the first barrier layer and the transition layer are both crystalline oxide layers; a crystallization degree of the first barrier layer and a crystallization degree of the transition layer are greater than a crystallization degree of the channel layer, and a band gap of the first barrier layer and a band gap of the transition layer are larger than a band gap of the channel layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.