Microdisplay architecture with light extraction efficiency enhancement
US12300774B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2022 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | Jun 22, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/0363
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A light source comprises a backplane wafer with electrical circuits fabricated thereon, and an array of LEDs coupled to the backplane wafer. Each LED of the array of LEDs comprises a mesa structure including semiconductor epitaxial layers and characterized by inwardly tilted mesa sidewalls, a high-refractive index material region (e.g., with a refractive index greater than about 1.75, such as equal to or greater than a refractive index of the semiconductor epitaxial layers) surrounding the semiconductor epitaxial layers of the mesa structure and including outwardly tilted sidewalls, and a reflective layer on the outwardly tilted sidewalls of the high-refractive index material region. In one example, each LED of the array of LEDs also include a passivation layer on the inwardly tilted mesa sidewalls of the mesa structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.