Transformer in a package substrate
US12302498B2 · kind B2 · utility
0Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2022 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | Mar 31, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19042
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present description concerns a device comprising at least one chip in a package, the package comprising a support, having the at least one chip resting thereon, and a protection layer covering the at least one chip, the support comprising a stack of layers made of an insulating material, a transformer being formed in the support by first and second conductive tracks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.