Electronic system and method for controlling burst length to access memory device of electronic system
US12307095B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2023 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | May 3, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4243
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic system is provided. A memory device includes a plurality of bank groups. A controller is coupled to the memory device and includes a request queue. The request queue is configured to store a plurality of requests. When the requests correspond to the different bank groups, the controller is configured to access data of the memory device according to a plurality of long burst commands corresponding to the requests. When the requests correspond to the same bank group, the controller is configured to access the data of the memory device according to a plurality of short burst commands corresponding to the requests. The short burst commands correspond to a short burst length, and the long burst commands correspond to a long burst length. The long burst length is twice the short burst length. The memory device is a low-power double data rate synchronous dynamic random access memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.