Molded product for semiconductor strip and method of manufacturing semiconductor package
US12308253B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2022 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | Nov 16, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/186
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor package may include providing a substrate having first and second cutting regions respectively provided along first and second side portions opposite to each other and a mounting region between the first and second cutting regions is provided, disposing at least one semiconductor chip on the mounting region, forming a molding member on the substrate, and removing a dummy curl portion and at least portions of dummy runner portions from the molding member. The molding member may include a sealing portion, the dummy curl portion provided outside the second side portion of the substrate, and the plurality of dummy runner portions on the second cutting region to connect the sealing portion and the dummy curl portion. The substrate may include adhesion reducing pads in the second cutting region, which may contact the dummy runner portions respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.