Phase-locked loop device and operation method thereof
US12308848B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2023 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | Aug 1, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase-locked loop device and its operating method are provided. The phase-locked loop device includes a voltage controlled oscillator configured to generate an output clock signal, a divider configured to divide the output clock signal into first and second phase division signals having a constant phase difference, a sampling phase frequency detector configured to sample a sampling voltage based on the first phase division signal and output any one of the sampling voltage, a first supply voltage, and a second supply voltage based on the second phase division signal, a transconductance circuit configured to output a conversion current based on a hold voltage, and a loop filter configured to generate a voltage control signal based on the conversion current and output the voltage control signal to the voltage controlled oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.