Semiconductor structure and method for fabricating same
US12309997B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 1, 2022 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | Dec 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
Abstract
Embodiments provide a semiconductor structure and a fabrication method thereof. The fabrication method includes: providing a substrate including a plurality of semiconductor layers arranged at intervals and an isolation layer positioned between adjacent two of the plurality of semiconductor layers, a given one of the plurality of semiconductor layers and the isolation layer being internally provided with trenches, and each of the trenches including a first region, a second region and a third region sequentially distributed; forming a sacrificial layer on an inner wall of the trench in the first region and the second region; forming an insulating layer filling up the trench on a surface of the sacrificial layer; removing the sacrificial layer in the second region, and removing the isolation layer of a first thickness to form voids surrounding the given semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.