Method for manufacturing semiconductor structure, semiconductor structure, and semiconductor memory
US12310247B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 17, 2022 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | Oct 20, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/80
Abstract
A method for manufacturing a semiconductor structure, a semiconductor structure and a semiconductor memory are provided. The method includes: providing a substrate; forming an MTJ structure and a first mask structure sequentially on the substrate; patterning the first mask structure to form a first pattern extending in a first direction; forming a second mask structure on the first pattern; patterning the second mask structure to form a second pattern extending in a second direction, in which the first direction intersects the second direction, and is not perpendicular to the second direction; patterning the first pattern by utilizing the second pattern to form a cellular pattern; and transferring the cellular pattern to the MTJ structure to form a cellular MTJ array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.