Dynamic memory area configuration for building page frame table entries
US12314605B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2023 |
| Grant date | May 27, 2025 |
| Priority date | — |
| Expiry date | Jun 5, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1009
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Dynamic memory area configuration includes designating a portion of memory as a specialized memory unit, and reserving a first portion of specialized memory unit for a plurality of page frame table entries (PFTEs) representing a plurality of frames in the specialized memory. One or more of the PFTEs are stored in respective queue entries within a queue in a reserved area of the specialized memory unit. A particular queue entry indicates that a particular PFTE associated with a particular frame is available for use. An offline request to take a second portion of the specialized memory unit offline is received. Whether to fulfill the offline request is determined based on whether the second portion of the specialized memory unit has an associated queue entry within the queue indicating that the associated frame is not in use back a portion of a page frame table (PFT) or the specialized memory unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.