Patent · US Active

Systems and methods for identifying and remediating architecture design defects

US12314646B2 · kind B2 · utility

0Cited by
3References
15Claims
0Family size

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Key dates

Filing dateMar 7, 2022
Grant dateMay 27, 2025
Priority date
Expiry dateOct 8, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06N20/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods for identifying and remediating architecture design defects are disclosed. In one aspect, a method includes generating a new architecture graph pattern based on an architecture design document of an evaluated architecture; determining a model graph pattern, wherein a shape of the model graph pattern is similar to a shape of the architecture graph pattern; determining, based on a comparison of the shape of the model graph pattern with the shape of the new architecture graph pattern, that the new architecture graph pattern includes a design defect; generating, based on the shape of the model graph pattern, a remediated graph pattern; and determining, based on the differences between the remediated graph pattern and the new architecture graph pattern, a suggested remedial change to the architecture design document.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.