Patent · US Active

Method for synchronizing analogue-digital or digital-analogue converters, and corresponding system

US12316337B2 · kind B2 · utility

0Cited by
3References
10Claims
0Family size

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Key dates

Filing dateJun 2, 2021
Grant dateMay 27, 2025
Priority date
Expiry dateJan 15, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/66
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

The invention relates to a method for synchronizing a plurality of analogue-digital or digital-analogue converters (CONV_k), the converters (CONV_k) all being connected to a control unit (UC), and to a clock (CLK) that has a predefined clock period (Tclk), the converters being also chained step-by-step so as to form a chain of converters, each converter (CONV_k) generating an internal synchronization signal (internal_sync_k) configured to supply a time reference on the transmission of data by the converter (CONV_k).The method allows the synchronization of the converters to be guaranteed using a process of learning and of configuration of the converters. The method allows any line distance constraint on the synchronization signal to be overcome.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.