Semiconductor device including peripheral contact
US12317485B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2022 |
| Grant date | May 27, 2025 |
| Priority date | — |
| Expiry date | Jun 9, 2043 |
Classification
- Technology area (CPC —)General
Abstract
A semiconductor device including a cell active pattern; a cell gate structure connected to the cell active pattern; a peripheral active pattern; a peripheral gate structure connected to the peripheral active pattern; a conductive pattern connected to the peripheral active pattern, the cell gate structure, or the peripheral gate structure; a capacitor structure electrically connected to the cell active pattern; an interlayer insulating layer surrounding the capacitor structure; and a peripheral contact connected to the conductive pattern while extending through the interlayer insulating layer, wherein the interlayer insulating layer includes a first material layer contacting the capacitor structure, and a second material layer on the first material layer, the peripheral contact includes a first portion contacting the first material layer, and a second portion contacting the second material layer, and a maximum width of the first portion is greater than a minimum width of the second portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.