Shielded-gate-trench MOSFET and method for manufacturing the same

US12317531B2 · kind B2 · utility

Assignee

• CHINA RESOURCES MICROELECTRONICS (CHONGQING) CO., LTD. · CN

Inventors

• Fei Luo · Somerville, US
• Yuling TANG · Chongqing, CN
• Mingjiang He · Chongqing, CN
• Jianwen Tan · Kunming, CN

Key dates

• Filing date: Apr 10, 2023
• Grant date: May 27, 2025
• Expiry date: Apr 10, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/665

Abstract

An SGT MOSFET comprising a substrate, an epitaxial layer, a masking dielectric layer, an interlayer dielectric layer, a source lead-out contact hole, and a source conductive layer and a method for manufacturing the SGT MOSFET are provided. The epitaxial layer is on an upper surface of the substrate and comprises a cellular trench structure, a terminal lead-out structure, a source lead-out structure, a body region, and a source region. The source lead-out structure comprises a source lead-out conductive layer. The masking dielectric layer and the interlayer dielectric layer are sequentially stacked above the epitaxial layer. The source lead-out contact hole penetrates the interlayer dielectric layer and the masking dielectric layer and extends into the source lead-out conductive layer, The source conductive layer fills the source lead-out contact hole. The masking dielectric layer is formed between the interlayer dielectric layer and the epitaxial layer and masks the third dielectric layer.