Integrated circuit with compact layout arrangement
US12321678B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2022 |
| Grant date | Jun 3, 2025 |
| Priority date | — |
| Expiry date | Oct 28, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) may include a plurality of functional blocks, and each functional block of the plurality of functional blocks may include hardware circuits, wherein the plurality of functional blocks may include a first functional block. In addition, the first functional block may include a first macro circuit that is positioned within a first sub-region of the first functional block, wherein among multiple sides of the first sub-region, a first side of the first sub-region is closest to a boundary of the first functional block. Additionally, a first intermediate sub-region of the first functional block is positioned between the first side of the first sub-region and the boundary of the first functional block, and there is no tap cell in the first intermediate sub-region of the first functional block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.