Patent · US Active

Semiconductor devices and methods

US12322647B2 · kind B2 · utility

0Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 3, 2022
Grant dateJun 3, 2025
Priority date
Expiry dateOct 12, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/015
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Semiconductor devices and methods of manufacture are presented herein in which a etch stop layer is selectively deposited over a conductive contact. A dielectric layer is formed over the etch stop layer and an opening is formed through the dielectric layer and the etch stop layer to expose the conductive contact. Conductive material is then deposited to fill the opening.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.