Integrated circuit
US12322693B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2021 |
| Grant date | Jun 3, 2025 |
| Priority date | — |
| Expiry date | Jan 24, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes first power supply lines which extend in a first direction and are spaced apart from each other in a second direction different from the first direction. A second power supply line extends in the first direction and is placed between the first power supply lines adjacent to each other in the second direction. A decoupling filler cell is placed between the first power supply lines adjacent to each other in the second direction. The decoupling filler cell includes a decoupling capacitor region formed by a gate electrode and a decap transistor including a first source/drain region of a first conductive type. The gate electrode is connected to the second power supply line, the first source/drain region is connected to the first power supply lines, and the second power supply line passes through the decoupling capacitor region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.