Patent · US Active

Efficient power electronics arrangement

US12323071B2 · kind B2 · utility

0Cited by
7References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 19, 2024
Grant dateJun 3, 2025
Priority date
Expiry dateJun 19, 2044

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L23/36
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

A power electronics converter includes a substrate and a converter commutation cell including a power circuit. The power circuit includes at least one power semiconductor switching element and at least one capacitor. Each power semiconductor switching element is comprised in a power semiconductor prepackage. An electrical connection side of the respective power semiconductor prepackage is spaced apart in a z direction from the substrate so as to define a prepackage gap between the substrate and the electrical connection side. At least a portion of the prepackage gap is filled with an electrically insulating material having voids. A converter parameter σ defined as an insulation fill factor divided by a maximum void size is greater than or equal to 10/mm. The insulation fill factor is defined as a cumulated volume of the voids subtracted from a volume of the electrically insulating material divided by the volume of the electrically insulating material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.