Low noise amplifier topology
US12323108B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2022 |
| Grant date | Jun 3, 2025 |
| Priority date | — |
| Expiry date | Jan 18, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/045
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low noise amplifier topology can achieve very low noise figure by applying multiple magnetic coupling between gate matching inductors and source degeneration inductor of a field effect transistor. The resulting low noise amplifier has smaller inductors, which can have lower thermal noise contribution, and can maintain good gain and linearity performance. For example, a low noise amplifier includes a first inductor to receive an input; a second inductor coupled to the first inductor in series; a first field effect transistor device whose gate receives a signal from the second inductor; and a third inductor coupled to a source of the first field effect transistor device, where the third inductor is magnetically positively coupled to the first inductor and the second inductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.