Spacer structure for semiconductor device
US12324209B2 · kind B2 · utility
0Cited by
2References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 28, 2023 |
| Grant date | Jun 3, 2025 |
| Priority date | — |
| Expiry date | Apr 28, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6219
Abstract
The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a fin structure over the substrate, a gate structure over the fin structure, a first inner spacer layer formed in the fin structure and adjacent to the gate structure, and a second inner spacer layer extending through the first inner spacer layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.