Semiconductor device
US12324238B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2022 |
| Grant date | Jun 3, 2025 |
| Priority date | — |
| Expiry date | Sep 23, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/953
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device is provided. The semiconductor device includes: first, second and third active patterns on a logic cell region of a substrate and are spaced apart from each other in a first direction; first and second gate electrodes, the first gate electrode crossing the first active pattern and the second gate electrode crossing the second active pattern; a first separation pattern provided between the first and second active patterns; a second separation pattern provided between the second and third active patterns; a first gate insulating layer interposed between the first gate electrode and the first active pattern; and a first gate cutting pattern interposed between the first and second gate electrodes, and in contact with a top surface of the first separation pattern. The first separation pattern is wider than the second separation pattern, and the first gate insulating layer extends between the first gate electrode and the first separation pattern, and contacts side and top surfaces of the first separation pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.