Patent · US Active

Systems and methods for fetching and writing instructions to memory

US12326814B1 · kind B1 · utility

0Cited by

2References

9Claims

0Family size

Assignee

Beken Corporation · CN

Inventors

Zhifu Liu · Wilmette, US
Zhilei Wang · Shanghai, CN
Pujie Yang · Shanghai, CN
Caogang Yu · Shanghai, CN

Key dates

Filing date	Mar 22, 2024
Grant date	Jun 10, 2025
Priority date	—
Expiry date	Mar 22, 2044

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/452
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A fetch process for a computing system is described herein. The computing system comprises a non-transitory memory. In the non-transitory memory, instructions are stored in Cycle-Redundancy Blocks (CRC blocks). Each of these CRC blocks comprises a first CRC code associated with the instructions stored in the CRC block. During a fetch process, the computing system generates a second CRC code based on the instructions stored in the CRC block and compares the second CRC code with the first CRC code to ascertain the success of the fetch process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.