Data processing method for improving continuity of data corresponding to continuous logical addresses as well as avoiding excessively consuming service life of memory blocks and the associated data storage device
US12327043B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 2, 2023 |
| Grant date | Jun 10, 2025 |
| Priority date | — |
| Expiry date | Oct 3, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage device includes a memory device and a memory controller. When a sub-region of the memory device is selected based on a predetermined rule to perform a data rearrangement procedure, the memory controller determines whether the selected sub-region is a system data sub-region. When determining that the selected sub-region is not a system data sub-region, the memory controller performs the data rearrangement procedure on the selected sub-region to move data corresponding to logical addresses belonging to the selected sub-region to a memory space of the memory device having continuous physical addresses, and when determining that the selected sub-region is a system data sub-region, the memory controller does not perform the data rearrangement procedure on the selected sub-region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.