Data receiving circuit, data receiving system and memory device
US12327610B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 14, 2023 |
| Grant date | Jun 10, 2025 |
| Priority date | — |
| Expiry date | Jul 23, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/222
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments provide a data receiving circuit. The data receiving circuit includes a first amplifier circuit and a second amplifier circuit. The first amplifier circuit is configured to receive a data signal, a first reference signal and a second reference signal, perform a first comparison between the data signal and the first reference signal and output a first signal pair, and perform a second comparison between the data signal and the second reference signal and output a second signal pair. The second amplifier circuit is configured to select to receive the first signal pair or the second signal pair as input signal pairs based on a feedback signal, amplify a voltage difference between the input signal pairs, and output a first output signal and a second output signal, wherein the feedback signal is obtained based on previously received data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.