Integrated circuit with address remapping circuitry to respond to a memory access request
US12332782B2 · kind B2 · utility
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4References
15Claims
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Key dates
| Filing date | Mar 22, 2023 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Mar 22, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system on chip (SoC) includes a CPU, a main bus, and a plurality of subsystems. The SoC also includes an address remapping module coupled between the CPU and the bus. The address remapping module quickly and efficiently changes any memory addresses that need to be changed with the CPU requests a read or write operation associated with the addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.