Patent · US Active

Input/output (I/O) store protocol for pipelining coherent operations

US12332783B2 · kind B2 · utility

0Cited by
6References
18Claims
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Inventors

Key dates

Filing dateOct 10, 2022
Grant dateJun 17, 2025
Priority date
Expiry dateJun 27, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2213/0026
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A data processing system includes a system fabric coupling a coherence manager and an input/output (I/O) requestor. The I/O requestor issues a first snoop request of a first I/O store operation and a subsequent second snoop request of a second I/O store operation. Each of the first and second snoop requests specifies an update to a respective storage location identified by a coherent memory address. The I/O requestor receives respective ownership coherence responses for each of the first and second I/O store operations. The respective first and second ownership coherence responses indicate the coherence manager has concurrent coherence ownership of the memory address for both the first and second I/O store operations. In response to receipt of each of the ownership coherence responses, the I/O requestor issues respective first and second execute coherence responses to command the coherence manager to initiate updates to the respective storage locations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.