Patent · US Active

Identifying unusable memory blocks based on zeros-ones imbalance in memory readouts

US12334176B2 · kind B2 · utility

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1References
20Claims
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Key dates

Filing dateJun 26, 2023
Grant dateJun 17, 2025
Priority date
Expiry dateJan 19, 2044

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C29/028
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A storage apparatus includes an interface and storage circuitry. The interface is configured to communicate with a plurality of memory cells organized in multiple memory blocks. The storage circuitry is configured to produce a given readout by reading data from a group of the memory cells in a given memory block, using a given read voltage, to calculate a given zeros-ones imbalance level of the given readout, based on the given zeros-ones imbalance level, to check whether the given readout level is zeros-ones balanced or unbalanced in accordance with a balance criterion, and upon detecting that the given readout is zeros-ones unbalanced, mark the given memory block as suspected of being unusable.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.