Fabricating semiconductor devices, such as VCSELs, with an oxide confinement layer
US12334711B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2021 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Jul 4, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/1838
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Methods for forming an at least partially oxidized confinement layer of a semiconductor device and corresponding semiconductor devices are provided. The method comprises forming two or more layers of a semiconductor device on a substrate. The layers include an exposed layer and a to-be-oxidized layer. The to-be-oxidized layer is disposed between the substrate and the exposed layer. The method further comprises etching, using a masking process, a pattern of holes that extend through the exposed layer at least to a first surface of the to-be-oxidized layer. Each hole of the pattern of holes extends in a direction that is transverse to a level plane that is parallel to the first surface of the to-be-oxidized layer. The method further comprises oxidizing the to-be-oxidized layer through the pattern of holes by exposing the two or more layers of the semiconductor device to an oxidizing gas to form a confinement layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.