Semiconductor structure and manufacturing method thereof
US12336169B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 20, 2022 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Aug 5, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/764
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a semiconductor structure and a manufacturing method thereof, relates to the technical field of semiconductors. The manufacturing method of the semiconductor structure includes: providing a substrate, a plurality of spaced first trenches being formed in the substrate; forming a sacrificial layer in the first trenches and a first protective layer on the sacrificial layer, the sacrificial layer and the first protective layer filling up the first trenches, and the first protective layer in the first trenches being provided with etching holes penetrating through the first protective layer; removing the sacrificial layer with the etching holes to form air gaps; and carrying out a silicification reaction on the substrate between adjacent ones of the first trenches and close to bottoms of the first trenches to form bit lines (BLs) in the substrate, parts of side surfaces of the BLs being exposed in the air gaps. t,?
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.