Split stack triple height cell
US12336280B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 7, 2023 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Jul 18, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Split stack triple height cells and methods of generating layouts of same are described herein. The structure includes a circuit formed within three stacked rows. The circuit includes a first stage having a first plurality of electrical components and a second stage having a second plurality of electrical components. The first row includes a first electrical component of the first plurality of electrical components within a top portion of the first row. A first electrical component of the second plurality of electrical components is within a bottom portion of the first row and a top portion of the second row. A second electrical component of the second plurality of electrical components is within a top portion of the third row and a bottom portion of the second row. A second electrical component of the first plurality of electrical components is within a bottom portion of the third row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.