Stacked image sensors
US12336315B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2023 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Feb 21, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/811
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The stacked image sensor includes a first semiconductor substrate and including a photoelectric conversion region and a floating diffusion area, a first insulating layer under the first semiconductor substrate and including a gate of a transfer transistor, a second semiconductor substrate under the first insulating layer and including first impurities of a first conductivity type, and a second insulating layer under the second semiconductor substrate and including a metal pad of a floating diffusion node and a gate of a source follower transistor, wherein the floating diffusion area and the metal pad of the floating diffusion node are electrically connected through a deep contact that is in the first insulating layer and the second semiconductor substrate. The second semiconductor substrate further includes a well region. At least a portion of deep contact may be in the well region. The well region may surround the deep contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.