Display
US12336406B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 2, 2021 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Oct 30, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/125
Abstract
A device configuration designed to mitigate display defects resulting from voltage drops in current supply lines offers a display with better display quality. The display includes: a plurality of VOLETs arranged in arrays along a first direction and a second direction; a data line supplying a voltage for controlling gate electrodes of the plurality of VOLETs; TFTs each connected between a gate electrode of each of the VOLET and the data line and controlling voltage supply to the gate electrodes of the VOLETs; a gate line connected to gate electrodes of the TFTs and transmitting a signal that controls the TFTs; a plurality of current supply lines extending along the first direction and supplying a current to each of a group of VOLETs aligned along the first direction; and an auxiliary line extending along the second direction and connecting at least two of the plurality of current supply lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.