Low drop-out regulator circuit, corresponding device and method
US12339691B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2023 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Jan 10, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A LDO regulator circuit comprises an input comparator and driver circuitry including transistors having a current flow path therethrough coupled to an output node of the regulator. First and second driver each comprises: driver transistors having the current flow paths therethrough coupled to the output node, capacitive boost circuitry that applies to the drive transistors a voltage-pumped replica of the comparison signal. Voltage refresh transistor circuitry coupled to the capacitive boost circuitry transfer thereon the voltage-pumped replica. The first and second drivers can be controllably switched between a first mode of operation, during which the current flow path through the driver transistors is conductive or non-conductive based on the voltage-pumped replica of the comparison signal, and a second mode, during which the voltage refresh transistor circuitry is activated to transfer the voltage-pumped replica of the comparison signal, and the current flow path through the driver transistors is non-conductive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.